DocumentCode :
3472371
Title :
A programmable-gain chopper-stabilized 2-ordder sigma-delta modulator design
Author :
Xuemei, Ji ; Jing, Bi ; Xiaobo, Wu ; Rubo, Hu ; Xiaolang, Yan
Author_Institution :
Inst. of VLSI Design, Zhejiang Univ., Hangzhou
fYear :
2006
fDate :
23-26 Oct. 2006
Firstpage :
1785
Lastpage :
1787
Abstract :
To meet the requirements of high precision low frequency measurement applications, a 16-bit sigma-delta A/D converter with programmable gain was proposed. The programmable gain input allows the ADC to accept input signals directly from a strain gage or transducer removing a considerable amount of signal conditioning. The circuit could also be digitally programmed to yield four input-to-output gain values (times 1, times 2, times 32, times 128). Since the use of chopper stabilization technique in the delta-sigma converter section, low frequency error reduction was achieved. It was designed in 0.6mum CMOS process and simulation results showed all desired performances were well achieved
Keywords :
choppers (circuits); programmable circuits; sigma-delta modulation; 0.6 micron; chopper stabilization technique; delta-sigma converter; input-to-output gain values; low frequency error reduction; programmable-gain chopper-stabilized 2-order sigma-delta modulator design; 1f noise; Choppers; Circuits; Delta-sigma modulation; Digital filters; Frequency measurement; Low pass filters; Low-frequency noise; Modulation coding; Transducers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
Type :
conf
DOI :
10.1109/ICSICT.2006.306447
Filename :
4098543
Link To Document :
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