An Innovative Embedded Logic Analyzer Based SoC Verification Platform

This paper describes an innovative hardware/software co-verification platform, based on an embedded logic analyzer (ELA) in FPGA emulator, for system-on-a-chip. With the general-purpose ELA, the platform is rich in reusability, which reduces the expense of SOC verification. By offering the interface, image of design under test (DUT) and virtual channel, the platform plays the role as glue, which integrates different verification methods together. External verification tools as well as software develop environment can be involved in the platform. Behavior model written in C language and assertion-based verification (ABV) are also supported in this verification platform. To improve the verification efficiency, the platform can capture different amount of sampling signals dynamically in different situations using application-specific verification program. This platform characterizes high efficiency, flexibility and portability with low cost