DocumentCode
347288
Title
Implementation of digital circuits in an InP scaled HBT technology
Author
Randall, B.A. ; Schwab, D.J. ; Walters, W.L. ; Nielsen, A.D. ; Amundsen, E.L.H. ; Sokolich, M.M. ; Brown, Y.K. ; Lui, M.M. ; Henige, J.A. ; Gilbert, B.K.
Author_Institution
Special Purpose Processor Dev. Group, Mayo Found., Rochester, MN, USA
fYear
1999
fDate
17-20 Oct. 1999
Firstpage
181
Lastpage
184
Abstract
The Mayo Foundation Special Purpose Processor Development Group (Mayo) and HRL Laboratories (HRL) are developing circuits for implementation in an indium phosphide (InP) scaled heterojunction bipolar transistor (HBT) technology which has the potential for very high performance analog and digital operation. Preliminary results from HRL show that the f/sub T/ of the devices can be improved from 90 GHz for the HRL InP standard (2 micron emitter) HBT technology to approximately 180 GHz for this scaled (1 micron emitter) HBT technology. Mayo has designed several digital circuits in this scaled technology, the initial test results for which are reported in this paper.
Keywords
III-V semiconductors; bipolar digital integrated circuits; digital communication; heterojunction bipolar transistors; indium compounds; integrated circuit testing; 1 micron; 180 GHz; HRL Laboratories; InP; Mayo Foundation; decimator circuit; digital receivers; initial test results; scaled HBT technology; Circuit synthesis; Circuit testing; Clocks; Digital circuits; Frequency; Gallium arsenide; Heterojunction bipolar transistors; Indium phosphide; Integrated circuit technology; Laboratories;
fLanguage
English
Publisher
ieee
Conference_Titel
GaAs IC Symposium, 1999. 21st Annual
Conference_Location
Monterey, CA, USA
ISSN
1064-7775
Print_ISBN
0-7803-5585-7
Type
conf
DOI
10.1109/GAAS.1999.803753
Filename
803753
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