DocumentCode :
347527
Title :
Plastic strain in thermally cycled flip-chip PBGA solderballs
Author :
Drexler, E.S.
Author_Institution :
Nat. Inst. of Stand. & Technol., Boulder, CO, USA
fYear :
1999
fDate :
1999
Firstpage :
239
Lastpage :
244
Abstract :
Electron-beam moire was used to observe and calculate strain in underfilled flip-chip PBGA packages. A package cross section, instrumented with 450 nm pitch gratings, was thermally cycled ten times between -55 and 125°C. During cycling, solder balls were observed and digital images collected from the edge, from an area one quarter of the way across, and from the chip midpoint. Comparison of the images with respect to initial no-load conditions revealed the change in moire fringe field due to the thermal load, and due to CTE mismatch among the materials that resulted in plastic deformation. Image data was analyzed to produce plots of displacement versus position from line traces through solder balls. Plot slopes from data generated within the balls define average strain. Strains were calculated at room temperature, -55°C and 125°C during each thermal cycle. Initial high-temperature strain, out of the chip plane, was greater for inner solder balls than at the chip edge. Initial low-temperature compressive strain was greater at the chip edge than in the chip interior. It was also found that for in-plane strains, the ball was under compression at both high and low temperatures. Underfill and solder mask expansion at high temperature was so great that they exerted compressive force on the solder balls. Strain changed with further thermal cycles, decreasing with increasing thermal cycles, particularly at the chip edge. By the 10th thermal cycle, the edge solder ball remained in compression even at 125°C. Also, the final room temperature images showed solder balls in all three measured locations to be in permanent compression
Keywords :
ball grid arrays; diffraction gratings; electron beam testing; encapsulation; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit testing; microassembling; moire fringes; particle interferometry; plastic deformation; plastic packaging; soldering; thermal expansion; thermal stresses; -55 to 125 C; 20 C; 450 nm; CTE mismatch; average solder ball strain; chip edge solder balls; compressive force; digital images; electron-beam moire interferometry; gratings; image data; in-plane strains; initial high-temperature strain; initial low-temperature compressive strain; initial no-load conditions; inner solder balls; line traces; moire fringe field; package cross section; permanent solder ball compression; plastic deformation; plastic strain; room temperature images; solder ball compression; solder ball strain; solder balls; solder mask expansion; strain; thermal cycles; thermal load; thermally cycled flip-chip PBGA solderballs; underfill expansion; underfilled flip-chip PBGA packages; Capacitive sensors; Data analysis; Digital images; Gratings; Image coding; Instruments; Packaging; Plastics; Temperature; Thermal loading;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT
Conference_Location :
Austin, TX
ISSN :
1089-8190
Print_ISBN :
0-7803-5502-4
Type :
conf
DOI :
10.1109/IEMT.1999.804827
Filename :
804827
Link To Document :
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