Testing reusable IP-a case study

This paper discusses the test strategies that can be employed for testing reusable Intellectual Property (IP). A typical System on Chip (SoC) design carried out at ARM is presented as a case study. It highlights the challenges faced when integrating IP blocks from diverse sources. A hybrid approach was found to be the most pragmatic solution, mixing bus-based, functional, scan and at-speed testing. The paper concludes with a look at how the task of resting reusable IP will benefit from industry standardisation efforts