DocumentCode
3476587
Title
Compact model and projection of silicon nanowire tunneling transistors (NW-tFETs)
Author
Qiming Shao ; Can Zhao ; Can Wu ; Jinyu Zhang ; Li Zhang ; Zhiping Yu
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
2013
fDate
3-5 June 2013
Firstpage
1
Lastpage
2
Abstract
We present in this paper a basic compact model incorporating several key physical mechanisms in nanowire tunneling field-effect transistors (NW-tFETs), such as non-constant subthreshold swing (SS), definition of an on voltage, ballistic transport for carriers in the channel, and quantum capacitance limit (QCL). Using experimental data from [1], the validity of this model is verified. Further, to project the performance of ultra-scaled silicon NW-tFETs, we compare the state-of-the-art gate-all-around (GAA) NW MOSFETs [2] with modeling results for the same NW diameter and EOT (effective oxide thickness). It is concluded that ultra-scaled NW-tFETs can achieve high performance with low subthreshold swing (SS) and nearly the same on current as in MOSFETs.
Keywords
elemental semiconductors; field effect transistors; nanowires; semiconductor device models; silicon; Si; ballistic transport; compact model; effective oxide thickness; nanowire diameter; nanowire tunneling field-effect transistors; nonconstant subthreshold swing; quantum capacitance limit; ultra-scaled silicon NW-tFET; Logic gates; MOSFET; Magnetic resonance imaging; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of
Conference_Location
Hong Kong
Type
conf
DOI
10.1109/EDSSC.2013.6628137
Filename
6628137
Link To Document