Title :
CMOS ESD protection circuits utilizing submicron transistors operating in the snapback mode
Author :
Henderson, Kevin ; Syrzycki, Marek ; Imiewski, K.
Author_Institution :
Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
Abstract :
The advancement of CMOS IC technologies presents increasing challenges in the design of reliable electrostatic discharge (ESD) protection. This paper presents novel CMOS ESD protection circuits using submicron MOS devices in the snapback region of operation. The measured characteristics of these ESD circuits are compared to simulations in HSPICE using previously developed models of MOS transistors in snapback.
Keywords :
CMOS integrated circuits; SPICE; circuit simulation; electrostatic discharge; integrated circuit design; integrated circuit modelling; integrated circuit reliability; CMOS ESD protection circuits; HSPICE; MOS transistors; circuit simulations; snapback mode; submicron transistors; CMOS integrated circuits; CMOS technology; Circuit simulation; Electrostatic discharge; Electrostatic measurements; MOS devices; MOSFETs; Protection; Semiconductor device modeling; Transistors;
Conference_Titel :
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location :
Edmonton, Alberta, Canada
Print_ISBN :
0-7803-5579-2
DOI :
10.1109/CCECE.1999.807234
