DocumentCode
347884
Title
Digit-serial digit-online addition
Author
Natter, W.G. ; Nowrouzian, B.
Author_Institution
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
Volume
1
fYear
1999
fDate
9-12 May 1999
Firstpage
583
Abstract
Digit-online arithmetic has gained considerable interest during the past two decades for high-speed real-time digital signal processing applications. In this paper, the digit-serial and digit-online arithmetic techniques are combined and applied to the development of a novel approach for the design of general digit-size digit-serial digit-online adder cells. The resulting digit-serial digit-online adder cells require only D single-digit digit-online adders for a corresponding hardware implementation, where D represents the digit size. A Matlab program has been developed for the emulation of the behavior of the proposed digit-serial digit-online addition operations. The correct functionality of these addition operations is confirmed by using Matlab simulations.
Keywords
adders; digital arithmetic; signal processing; Matlab program; Matlab simulations; digit-online arithmetic techniques; digit-serial arithmetic techniques; digit-serial digit-online addition; general digit-size digit-serial digit-online adder cells; hardware implementation; high-speed real-time digital signal processing; single-digit digit-online adders; Adders; Analog-digital conversion; Application software; Clocks; Delay; Digital arithmetic; Digital signal processing; Emulation; Hardware; Power generation;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location
Edmonton, Alberta, Canada
ISSN
0840-7789
Print_ISBN
0-7803-5579-2
Type
conf
DOI
10.1109/CCECE.1999.807264
Filename
807264
Link To Document