Title :
Cache-Processor Coupling: A Fast & Wide On-Chip Data Cache Design
Author :
Motomura, M. ; Inoue, T. ; Yamada, Hiroyoshi ; Konagaya, A.
Author_Institution :
NEC Corporation, Japan
Keywords :
Added delay; Bandwidth; Circuit simulation; Coupling circuits; Decoding; National electric code; Radio frequency; Registers; Synthetic aperture sonar; Virtual private networks;
Conference_Titel :
VLSI Circuits, 1994. Digest of Technical Papers., 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1918-4
DOI :
10.1109/VLSIC.1994.586220
