DocumentCode
3479902
Title
Work in Progress - A Visual Cache Memory Simulator
Author
Neebel, Danial ; Augeri, Chris ; MacMillan, Gordon ; Baird, Leemon ; De Freitas, Allan
fYear
2005
fDate
19-22 Oct. 2005
Abstract
Cache memory performance analysis is a challenging topic upon first introduction. Students must synthesize a significant amount of computer architecture knowledge, comprehend reasonably complex replacement strategies, and analyze performance. We propose a programming exercise that has students develop a visual cache memory simulator and then use the simulator to analyze several memory reference trace files. Our student learning assessment measured the quality of each team programming exercise solution and each individual´s own cache performance analysis. In addition, the final exam has several questions related to cache memory. Early results indicate students achieve a better understanding of cache memory and its impact on performance
Keywords
cache storage; computer architecture; computer science education; percolation; analyze performance; complex replacement strategies; computer architecture knowledge; final exam; memory reference trace files; programming exercise; student learning assessment; team programming exercise solution; visual cache memory simulator; Analytical models; Cache memory; Computational modeling; Computer architecture; Computer languages; Computer science; Digital systems; Graphical user interfaces; Performance analysis; Programming; Cache Memory; Computer Architecture; Performance Analysis; Programming Project;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers in Education, 2005. FIE '05. Proceedings 35th Annual Conference
Conference_Location
Indianopolis, IN
ISSN
0190-5848
Print_ISBN
0-7803-9077-6
Type
conf
DOI
10.1109/FIE.2005.1611966
Filename
1611966
Link To Document