Title :
A new peripheral planar structure allowing a symmetrical blocking voltage
Author :
Causse, O. ; Austin, P. ; Sanchez, J.L.
Author_Institution :
Lab. d´´Autom. et d´´Anal. des Syst., CNRS, Toulouse, France
Abstract :
A new peripheral symmetrical planar structure of junction termination type is presented, allowing symmetrical blocking voltage. This peripheral structure can be considered as a new element for power monolithic integration. Based on 2D simulations, this peripheral structure has been optimized to obtain the maximum two-directional breakdown voltage capability
Keywords :
avalanche breakdown; circuit simulation; power integrated circuits; power semiconductor switches; semiconductor device breakdown; semiconductor device models; 2D simulations; PISCES; avalanche breakdowm; current distribution; depletion layer; junction termination type; peripheral planar structure; power monolithic integration element; power semiconductor devices; symmetrical blocking voltage; two-directional breakdown voltage capability; Cathodes; Circuit simulation; Design optimization; Geometry; Monolithic integrated circuits; Power electronics; Power semiconductor devices; Silicon; Thyristors; Voltage;
Conference_Titel :
Semiconductor Conference, 1999. CAS '99 Proceedings. 1999 International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-5139-8
DOI :
10.1109/SMICND.1999.810387
