DocumentCode
3483319
Title
Parallel-plate noise isolation using a macro-via photonic crystal structure in advanced package
Author
Chuang, Hao-Hsiang ; Wu, Tzong-Lin ; Wang, Ting-Kuang
Author_Institution
Dept. of Electron. Eng., Nat. Taiwan Univ., Taipei
fYear
2008
fDate
16-20 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
A novel macro-via crystal (MVPC) structure is proposed for suppression of PPNs in high-speed or mixed signal circuit package. This structure is designed by periodically embedding macro-via cylinders, which consist of six vias and two circular pads, between the power and ground planes. Compared with previously proposed EBG structures, several advantages have been demonstrated. First, etching slots or high-density vias are not required. It will have better SI and PI performance for the package. Second, it can be fabricated in the typical and low-cost package process. Third, significant routing space is available on the layers between power and ground planes. A test sample was fabricated in the package substrate. Excellent PPN suppression has been presented from 1.8 GHz to 5.6 GHz. Agreement between the measurement and simulation is favorably good.
Keywords
electronics packaging; interference suppression; network routing; photonic band gap; photonic crystals; electromagnetic bandgap; etching; frequency 1.8 GHz to 5 GHz; ground planes; low-cost package process; macro-via photonic crystal structure; mixed signal circuit package; parallel-plate noise isolation; Bandwidth; Costs; Dielectric substrates; Etching; Fabrication; Metamaterials; Packaging; Periodic structures; Photonic crystals; RF signals;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location
Macau
Print_ISBN
978-1-4244-2641-6
Electronic_ISBN
978-1-4244-2642-3
Type
conf
DOI
10.1109/APMC.2008.4958132
Filename
4958132
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