Title :
Empirical Characteristics and Extraction of Overall Variations for 65-nm MOSFETs and Beyond
Author :
Kanno, Michihiro ; Shibuya, Akira ; Matsumura, Masao ; Tamura, Kazuhiro ; Tsuno, Hitoshi ; Mori, Shigetaka ; Fukuzaki, Yuzo ; Gocho, Tetsuo ; Ansai, Hisahiro ; Nagashima, Naoki
Author_Institution :
Sony Corp., Atsugi
Abstract :
This paper proposes a practical methodology to extract overall variations of MOSFET characteristics on 65nm node and beyond. Firstly, we show how MOSFET variations are originated and categorized by these causes and unit regions. Secondly, we demonstrate how these variations are quantitatively separated into random and systematic components from experimental results by transistor array Test Element Group (TEED). The results reveal that the ratio of total variations to random components becomes greater with scaling down, and the changes of mean values of MOSFET characteristics, which depend on layout parameters, are too large to be negligible compared to total variations. Finally we show the flowchart to accurately extract MOSFET overall variations for 65nm and beyond.
Keywords :
MOSFET; semiconductor device testing; MOSFET; empirical characteristics; overall variations extraction; random components; size 65 nm; test element group; transistor array; Data mining; FETs; Flowcharts; Least squares methods; Logic circuits; MOSFETs; Random access memory; SPICE; Standards development; System testing;
Conference_Titel :
VLSI Technology, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-03-1
DOI :
10.1109/VLSIT.2007.4339738
