DocumentCode :
3486872
Title :
On-chip interference suppression effect of S-shape inductor VCO
Author :
Su, Hsin-Chia ; You, Pen-Li ; Huang, Kai-Li ; Huang, Tzuen-Hsi
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
fYear :
2008
fDate :
16-20 Dec. 2008
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, a novel inductor with the S-shape layout is considered, designed and proposed to improve the drawbacks of the conventional spiral inductors. Due to the inherent feature of S-shape layout, the EM field distributions of the novel inductor are more constrained to the planar structure itself, rather than widely out-spread. The EM coupling effect through the substrate is thus relaxed. A testkey by integrating two VCO´s with a traditional spiral inductor and a proposed S-shape inductor respectively is implemented in a 0.18-mum CMOS technology to study the coupling effect. Also compared in this paper are the measured VCO circuit performances from the testkey.
Keywords :
CMOS integrated circuits; electromagnetic coupling; electromagnetic field theory; inductors; interference suppression; voltage-controlled oscillators; S-shape inductor VCO; on-chip interference suppression effect; CMOS technology; Circuit testing; Coupling circuits; Inductors; Integrated circuit measurements; Interference constraints; Interference suppression; Performance evaluation; Spirals; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location :
Macau
Print_ISBN :
978-1-4244-2641-6
Electronic_ISBN :
978-1-4244-2642-3
Type :
conf
DOI :
10.1109/APMC.2008.4958310
Filename :
4958310
Link To Document :
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