DocumentCode
3486960
Title
Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions
Author
Strasser, Martin ; Eick, Michael ; Gräb, Helmut ; Schlichtmann, Ulf ; Johannes, Frank M.
Author_Institution
Inst. for Electron. Design Autom., Tech. Univ. Miinchen, Munich
fYear
2008
fDate
10-13 Nov. 2008
Firstpage
306
Lastpage
313
Abstract
The analog placement algorithm Plantage, presented in this paper, generates placements for analog circuits with comprehensive placement constraints. Plantage is based on a hierarchically bounded enumeration of basic building blocks, using B*-trees. The practically relevant solution space is thereby enumerated quasi-complete. The sets of possible placements of the basic building blocks are represented and combined in a new efficient way, using enhanced shape functions. The result of Plantage is the Pareto front of placements with respect to different aspect ratios. The whole approach is deterministic, in contrast to existing analog placement algorithms.
Keywords
Pareto analysis; analogue circuits; trees (mathematics); B*-trees; Pareto front of placement; analog placement algorithm Plantage; deterministic analog circuit placement; enhanced shape function; hierarchically bounded enumeration; Analog circuits; Analog integrated circuits; Capacitors; Digital circuits; Electronic design automation and methodology; Equations; Gravity; Hydrogen; Shape; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-4244-2819-9
Electronic_ISBN
1092-3152
Type
conf
DOI
10.1109/ICCAD.2008.4681591
Filename
4681591
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