Title :
Automatic verification of march tests [SRAMs]
Author :
van de Goor, A.J. ; Smit, B.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Abstract :
Completeness and irredundancy proofs for SRAM march tests can be quite complicated. The authors present a method to automatically verify march tests. This method can be adapted for any other memory test. They present a way of modelling faults mathematically and describe how the verification process has been automated
Keywords :
SRAM chips; decoding; fault location; finite state machines; integrated circuit testing; logic testing; FSM; address decoder faults; automatic verification; completeness proofs; fault modelling; irredundancy proofs; march tests; memory faults; memory test; static RAM; Automata; Automatic testing; Decoding; Fault detection; Mathematical model; Random access memory; Writing;
Conference_Titel :
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-4150-9
DOI :
10.1109/MT.1993.263136
