A 20 MHz test vector generator for producing tests that detect single 4- and 5-coupling faults in RAMs

The author describes a 20 MHz RAM test vector generator that generates both deterministic and probabilistic tests for detecting single 4-coupling or 5-coupling faults (as defined by Nair, Thatte, and Abraham). Such faults model pattern sensitivities involving 4 or 5 cells, respectively, when nothing is known about the mapping from logical cell addresses to physical cell locations. The generated tests are thus unaffected by cell re-arrangements resulting from multiple vendors, decoder address scrambling, and repair using redundant cells. Using a parallel test mode, all sub-arrays in a RAM can be tested together even if each sub-array has a different cell arrangement. The generator consists of one 60 K transistor semicustom IC and one 4 Mbit look-up PROM