DocumentCode
3490948
Title
A low-power image convolution algorithm for variable voltage processors
Author
Kwon, Hyugjin ; Kim, Jihong
Author_Institution
Sch. of Comput. Sci. & Eng., Seoul Nat. Univ., South Korea
Volume
2
fYear
2003
fDate
6-10 April 2003
Abstract
We describe a low-power image convolution algorithm for variable voltage processors. The algorithm takes advantages of common properties of popular kernels. Unlike a direct algorithm of convolution operation where the dynamic voltage scaling (DVS) feature of variable voltage processors cannot be used, our algorithm modifies the sequence of computing convolution sums so that DVS can be effectively utilized. Our implementation on Itsy, a DVS research platform from Compaq, shows the energy saving of up to 71% over that of the direct algorithm without any performance degradation.
Keywords
convolution; digital signal processing chips; image processing; power consumption; Compaq; DVS research platform; Itsy; dynamic voltage scaling; energy saving; kernels; low-power image convolution algorithm; variable voltage processors; Application software; Circuits; Clocks; Computer science; Convolution; Dynamic voltage scaling; Energy consumption; Kernel; Threshold voltage; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03). 2003 IEEE International Conference on
ISSN
1520-6149
Print_ISBN
0-7803-7663-3
Type
conf
DOI
10.1109/ICASSP.2003.1202457
Filename
1202457
Link To Document