Title :
Double Gate Tunnel FET with ultrathin silicon body and high-k gate dielectric
Author :
Boucart, Kathy ; Ionescu, A.M.
Author_Institution :
Inst. of Microelectron. & Microsyst., Swiss Fed. Inst. of Technol. Lausanne
Abstract :
In this paper we propose a novel design for a double gate tunnel field effect transistor (DG TFET), for which the simulations show significant improvements compared with single gate devices with a SiO 2 gate dielectric. For the first time, double gate devices using a high-K gate dielectric are explored, showing on-current as high as 1 mA for a gate voltage of 1.2 V, reduced off-current as low as 0.1 fA, improved average subthreshold swing of 52 mV/decade, and a minimum point slope of 18 mV/decade. An Ion/Ioff ratio of more than 1012 is shown
Keywords :
dielectric materials; field effect transistors; silicon compounds; tunnel transistors; 1.2 V; SiO2; double gate tunnel field effect transistor; high-k gate dielectric; CMOS technology; Costs; Dielectric devices; Dielectric substrates; Double-gate FETs; Fabrication; MOSFETs; Silicon; Tunneling; Voltage;
Conference_Titel :
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
Conference_Location :
Montreux
Print_ISBN :
1-4244-0301-4
DOI :
10.1109/ESSDER.2006.307718
