DocumentCode
3497335
Title
Error control aspects of high speed networks
Author
Dravida, S.
Author_Institution
AT&T Bell Labs., Holmdel, NJ, USA
fYear
1992
fDate
4-8 May 1992
Firstpage
272
Abstract
Error control problems arising in the broadband ISDN environment are analyzed. The first problem relates to end-to-end integrity. The second problem is related to synchronization. The third problem is the performance of the cell-based cyclic redundancy check (CRC) in the presence of a self-synchronous scrambler to avoid attacks by malicious users. However, the scrambler creates error multiplication whereby a single error on the physical link is translated into two errors in the cell exactly 43 bits apart. In this context, it is proved that the cell-based CRC is capable of correcting correlated double errors produced by the self-asynchronous scrambler. The last problem studied is parallel implementation of CRC coders and decoders
Keywords
B-ISDN; cyclic codes; synchronisation; B-ISDN; CRC coders; CRC decoders; broadband ISDN; cell-based CRC; cell-based cyclic redundancy check; correlated double errors; end-to-end integrity; error control; error multiplication; high speed networks; parallel implementation; self-synchronous scrambler; synchronization; Asynchronous transfer mode; B-ISDN; Bandwidth; Circuits; Cyclic redundancy check; Error correction; High-speed networks; Protection; Robust control; SONET;
fLanguage
English
Publisher
ieee
Conference_Titel
INFOCOM '92. Eleventh Annual Joint Conference of the IEEE Computer and Communications Societies, IEEE
Conference_Location
Florence
Print_ISBN
0-7803-0602-3
Type
conf
DOI
10.1109/INFCOM.1992.263560
Filename
263560
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