DocumentCode
3498677
Title
CODA: A concurrent online delay measurement architecture for critical paths
Author
Zhang, Yubin ; Yu, Haile ; Xu, Qiang
Author_Institution
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Hong Kong, China
fYear
2012
fDate
Jan. 30 2012-Feb. 2 2012
Firstpage
169
Lastpage
174
Abstract
With technology scaling, integrated circuits behave more unpredictably due to process variation, environmental changes and aging effects. Various variation-aware and adaptive design methodologies have been proposed to tackle this problem. Clearly, more effective solutions can be obtained if we are able to collect real-time information such as the actual propagation delay of critical paths when the circuit is running in normal function mode. Motivated by the above, in this paper, we propose a novel concurrent online delay measurement architecture for critical paths, namely CODA, to facilitate this task. Experimental results demonstrate high accuracy and practicality of the proposed technique.
Keywords
integrated circuit design; integrated circuit testing; time-digital conversion; adaptive design methodology; aging effect; concurrent online delay measurement architecture; integrated circuit; variation-aware methodology; Clocks; Delay; Measurement uncertainty; Probes; Semiconductor device measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific
Conference_Location
Sydney, NSW
ISSN
2153-6961
Print_ISBN
978-1-4673-0770-3
Type
conf
DOI
10.1109/ASPDAC.2012.6164939
Filename
6164939
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