SEPIC design- part I: Inductive damping

This paper and the companion Part II discuss issues related to models and methods for Peak-Current-Controlled SEPIC design aimed at achieving intrinsic stability of the current loop. This paper shows that the reliable stability limit for the ratio between output and input inductances, such that intrinsic stability of current loop is guaranteed for whatever value of compensation ramp slope, can be determined by means of an accurate model taking into account that the average voltage across coupling capacitor is not equal to average input voltage in ac. Contour plots of the damping factor of dominant complex poles of the closed current loop input-to-coupling capacitor voltage gain, as function of the ratio between output and input inductances, are used to detect couples of inductors ensuring stability and clean damping of oscillations at minimum input voltage. A converter has been mounted and its control-to output gain has been measured to verify the correctness of the results. The companion paper Part II presents a method to design a parallel damping branch to achieve intrinsic stability of SEPIC current loop, which guarantees the achievement of good damping without increasing the size of the output inductor with respect to input one.