DocumentCode :
3502431
Title :
Minimizing ohmic loss in future processor IR events
Author :
Budnik, Mark M. ; Roy, Kaushik
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN
fYear :
2006
fDate :
27-29 March 2006
Lastpage :
658
Abstract :
IR events are periods in time when processors draw a high level of steady state operating current. During IR events, ohmic losses occur in the power delivery path. To minimize these ohmic losses, conventional systems use parallelism to reduce the resistance of the power delivery path. As operating currents continue to increase, however, additional remedies may be required to maintain acceptable ohmic losses. We show how a processor with integrated step down converters can be used to reduce the ohmic loss in its power delivery path. In a 130nm technology node, our integrated solution can reduce the delivery path ohmic loss by 32.8%
Keywords :
integrated circuit design; logic design; microprocessor chips; 130 nm; integrated step down converters; ohmic losses; power delivery path; processor IR events; steady state operating current; Electric resistance; Microprocessors; Optical computing; Parallel processing; Power dissipation; Power engineering and energy; Power engineering computing; Regulators; Steady-state; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-2523-7
Type :
conf
DOI :
10.1109/ISQED.2006.88
Filename :
1613211
Link To Document :
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