Title :
Statistical correction of A/D converter errors
Author :
Shu, Tzi-Hsiung ; Bacrania, Kantilal ; Chi, Chong-In
Author_Institution :
Harris Semicond., Melbourne, FL, USA
fDate :
29 Sep-1 Oct 1996
Abstract :
A method to correct the pipelined and multi-step A/D converter errors is proposed and implemented on a low-power 12-bit 10 M sample/s analog-to-digital converter. The converter consumes 315 mW from a single 5 V supply and exhibits wide input bandwidth, good linearity (DNL=-0.36 LSB), and low distortion with a spurious-free dynamic range (SFDR) of 83 dB
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; calibration; error correction; errors; statistical analysis; 10 MHz; 12 bit; 315 mW; 5 V; A/D converter errors; analog-to-digital converter; multi-step ADC; pipelined ADC; statistical correction; Analog-digital conversion; Bandwidth; Calibration; Error correction; Histograms; Linearity; Monitoring; Phase measurement; Resistors; Voltage;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 1996., Proceedings of the 1996
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-3516-3
DOI :
10.1109/BIPOL.1996.554644
