Title :
A 10 bit, 2Ms/s, 15 mW BiCMOS cyclic RSD A/D converter
Author :
Garrity, Doug ; Rakers, Pat
Author_Institution :
Dept. of Strategic Syst. Technol., Motorola Semicond. Products Sector, Tempe, AZ, USA
fDate :
29 Sep-1 Oct 1996
Abstract :
A 10 bit, 2 megasamples per second (Ms/s) BiCMOS cyclic analog to digital converter (ADC) is presented. The ADC is optimized for low power operation and employs digital error correction based on the redundant signed digit (RSD) principle to correct for gain and offset errors
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; error correction; errors; 0.8 micron; 10 bit; 15 mW; A/D converter; BiCMOS cyclic RSD ADC; analog to digital converter; digital error correction; gain errors; low power operation; offset errors; redundant signed digit principle; BiCMOS integrated circuits; Clocks; Code standards; Digital control; Linearity; Logic circuits; Operational amplifiers; Region 1; Synchronization; Voltage control;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 1996., Proceedings of the 1996
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-3516-3
DOI :
10.1109/BIPOL.1996.554645
