Title :
A runlength limited low-density parity-check coding scheme
Author :
Vasic, Bane ; Pedagani, Karunakar
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
Abstract :
In this paper, we propose a novel approach to modulation and error control coding. The idea is to completely eliminate a constrained code and, instead, impose the constraint by the deliberate introduction of bit errors before transmission. The redundancy that would have been used for imposing the constraint is used in our scheme to strengthen the error control code (ECC), in such a way that the ECC becomes capable of correcting both deliberate errors as well as channel errors that occurs during the detection. The proposed ECC-modulation scheme is based on iterative decoding of low-density parity-check codes (LDPC) and a runlength constraint.
Keywords :
concatenated codes; error correction codes; error statistics; iterative decoding; parity check codes; telecommunication channels; LDPC; bit errors; channel errors; error control coding; inverse concatenation; iterative decoding; runlength constraint; runlength limited low-density parity-check coding scheme; Algorithm design and analysis; Automata; Block codes; Decoding; Error correction; Error correction codes; Interference constraints; Modulation coding; Parity check codes; Redundancy;
Conference_Titel :
Communications, 2003. ICC '03. IEEE International Conference on
Print_ISBN :
0-7803-7802-4
DOI :
10.1109/ICC.2003.1203993