• DocumentCode
    351250
  • Title

    Theoretical evaluation and simulation of a novel phase locked loop with low phase noise and fast settling times

  • Author

    de Villiers, J.P. ; Linde, L.P.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Pretoria Univ., South Africa
  • Volume
    1
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    165
  • Abstract
    This paper contains the theoretical description and simulation results of a novel phase detector. This method, originally developed by Zuta (1998) for frequency synthesizers, can be extended to carrier synchronisation, greatly increasing the pull-in range and reducing phase noise and settling time compared to conventional PLL techniques. This makes it ideally suited for frequency hopping and burst mode mobile digital communication applications
  • Keywords
    circuit simulation; digital phase locked loops; digital radio; frequency hop communication; mobile radio; phase detectors; phase noise; radio equipment; synchronisation; PLL; burst mode mobile digital communication; carrier synchronisation; fast settling times; frequency hopping applications; low phase noise; phase detector; phase locked loop; simulation results; Counting circuits; Digital communication; Frequency synchronization; Frequency synthesizers; Local oscillators; Phase detection; Phase frequency detector; Phase locked loops; Phase noise; Spread spectrum communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Africon, 1999 IEEE
  • Conference_Location
    Cape Town
  • Print_ISBN
    0-7803-5546-6
  • Type

    conf

  • DOI
    10.1109/AFRCON.1999.820786
  • Filename
    820786