The MANy JAva Core processor (MANJAC)

The increasing number of processor cores on a single die raises new questions concerning among others processor architecture, task scheduling, interconnection network, routing, and reliability. Unfortunately, answers to these questions cannot be found isolated because these topics are highly related to each other. For example, finding an optimal task scheduling depends strongly on the interconnection network and the routing mechanism. Hence, a technique to evaluate all these issues with different design decisions must be provided. The COTSon simulator from HP Labs provides exactly the degree of detail that is required to get significant results. Nevertheless, simulating a detailed many-core system with dozens or hundreds of processor cores would require a long period to get first results. Consequently, an extensive design space exploration is nearly unfeasible. As an alternative, we developed a flexible evaluation prototype called MANJAC (MANy JAva Cores) comprising 64 nodes, each equipped with an Altera FPGA, 128 MB SDRAM, 2 MB SRAM, 8 MB FlashROM, and 4 Ethernet interfaces. The network topology can be configured individually by standard Ethernet cables. The current configuration forms a mesh with eight by eight nodes. Each node contains six multithreaded jamuth Java cores running at 40 MHz that are connected to the common SDRAM. Due to the jamuth core supports four hardware thread slots, each node is able to execute up to 24 threads in parallel resulting in an overall load of 1536 threads for all 64 boards. The great advantage of MANJAC is that it is able to execute nearly all standard Java programs without or only with minor changes. Although the current design targets on a Java processor, the MANJAC system can be used for any kind of processor architecture.