DocumentCode :
3517939
Title :
Process Technologies Enabling Future Memory Platforms
Author :
Lee, Gill Yong ; Chen, Po-Ta ; Kim, Sung-Woo
Author_Institution :
Silicon Syst. Group, Appl. Mater. Inc., Sunnyvale, CA, USA
fYear :
2011
fDate :
22-25 May 2011
Firstpage :
1
Lastpage :
4
Abstract :
The dramatic market demand for flash memory in the past decade has vigorously driven technology evolution. Traditional memory scaling is facing huge lithographic barriers resulting in the inevitable pursuit of non-planar solutions. In this paper, we discuss the process technologies that are enabling us to overcome the challenges of extending the current planar platform while transitioning into future three-dimensional architectures.
Keywords :
flash memories; lithography; flash memory platform; lithographic barrier; memory scaling; nonplanar solution; planar platform; process technology; Arrays; Dielectrics; Flash memory; Microprocessors; Three dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Workshop (IMW), 2011 3rd IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4577-0225-9
Electronic_ISBN :
978-1-4577-0224-2
Type :
conf
DOI :
10.1109/IMW.2011.5873195
Filename :
5873195
Link To Document :
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