DocumentCode :
3518339
Title :
Logic-Based Mega-Bit CuxSiyO emRRAM with Excellent Scalability Down to 22nm Node for post-emFLASH SOC Era
Author :
Wang, Yanliang ; Yang, Lingming ; Wang, Ming ; Luo, Wenjin ; Hu, Beiyuan ; Lin, Yinyin ; Huang, Ryan ; Zou, Qingtian ; Wu, Jingang
Author_Institution :
Dept. Microelectron., Fudan Univ., Shanghai, China
fYear :
2011
fDate :
22-25 May 2011
Firstpage :
1
Lastpage :
2
Abstract :
Excellent scalability of a novel CuxSiyO emRRAM down to 22 nm node is demonstrated based on statistical data of 1 Mb test chip for the first time. The integration utilizes the standard logic process and the RRAM size is shrunk by spacer pattern technology. The reset current decreases by 5X from 130nm to 22nm node with maintaining robust data retention (10yrs. @150°C), good resistance distribution (with 10X window @125°C), significant read disturbance immunity (after 1010 cycles @0.5V, 50ns pulse), acceptable fast speed (set 100ns; reset 60us), and competitive cost effectiveness (no dedicated tools). This solution is promising in the advanced logic node for SOC applications of post-emFLASH era.
Keywords :
copper compounds; flash memories; integrated circuit reliability; random-access storage; silicon compounds; system-on-chip; CuxSiyO; logic-based mega-bit emRRAM; post-emFLASH SOC; read disturbance immunity; resistance distribution; robust data retention; size 130 nm to 22 nm; spacer pattern technology; statistical data; storage capacity 1 Mbit; Arrays; Copper; EPROM; Resistance; Scalability; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Workshop (IMW), 2011 3rd IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4577-0225-9
Electronic_ISBN :
978-1-4577-0224-2
Type :
conf
DOI :
10.1109/IMW.2011.5873218
Filename :
5873218
Link To Document :
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