An SOI nano flash memory device

Several nano flash memory devices have been reported in the literature (Nakajima et al. 1996; Guo et al. 1996; Welser et al. 1997). These devices are basically miniature EEPROM cells in which electrons are injected in a floating storage node by tunnel effect through an oxide layer. The variation of the potential of the floating node due to electron injection modifies the threshold voltage of a thin and narrow SOI MOSFET, which makes it possible to store information in the device. This paper describes the fabrication of an SOI nano flash memory device using Unibond/sup (R)/ wafers and e-beam lithography. The device can be programmed and erased using 5 V gate voltage pulses. The area of the active storage region is 150 nm/spl times/150 nm.