DocumentCode
3519101
Title
Design and prototyping of a ΣΔ decimator filter for DECT standard
Author
Naviner, L. ; Naviner, J.-F. ; Petit, H. ; Loumeau, P.
Author_Institution
Departement Commun. et Electronique, Ecole Nat. Superieure des Telecommun., Paris, France
Volume
2
fYear
2000
fDate
2000
Firstpage
698
Abstract
Deals with the design and prototyping of a decimation filter for DECT standard. Efficient implementation is obtained with a careful design of the filter and an FPGA structure oriented VHDL modelling, reducing power computation and routing needs. A filter prototype has been implemented in a programmable Altera circuit FLEX10K20
Keywords
cordless telephone systems; digital filters; field programmable gate arrays; hardware description languages; network routing; sigma-delta modulation; DECT standard; FLEX10K20; FPGA structure; VHDL modelling; power computation; programmable Altera circuit; routing needs; sigma-delta decimator filter; Attenuation; Band pass filters; Filtering; Finite impulse response filter; Hardware; Nonlinear filters; Prototypes; Receiving antennas; Sampling methods; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.952852
Filename
952852
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