Title :
Sub-modeling technique for thermo-mechanical simulation of solder microbumps assembly in 3D chip stacking
Author :
Khong, Chee Houe ; Yu, Aibin ; Zhang, Xiaowu ; Kripesh, V. ; Pinjala, D. ; Kwong, Dim-Lee ; Chen, S. ; Chan, Chien-Feng ; Chao, Chun-Chieh ; Chiu, Chi-Hsin ; Huang, Chih-Ming ; Che, Carl
Author_Institution :
Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
Abstract :
The submodeling technique is a powerful analysis tool. The method promotes more accurate analysis and also helps enhance productivity. It has been shown that by using displacement-force cut boundary condition method, it can be made even more versatile. The local stress phenomena of the solder microbump have been solved with this approach to demonstrate the concept. From the simulation model, it is known that the ENIG pad thickness has an effect on the aluminium pad stress in the silicon chip. This is important as the shear stress will damage the pad and circuitry on the chip. Previously this is not reported in other literatures as there is no strain gage available that can measure such a small dimension.
Keywords :
integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; microassembling; soldering; stacking; thermal management (packaging); thermal stresses; three-dimensional integrated circuits; 3D chip stacking; ENIG pad thickness; displacement force cut boundary condition method; local stress phenomena; solder microbumps assembly; submodeling technique; thermo-mechanical simulation; Aluminum; Assembly; Boundary conditions; Circuit simulation; Productivity; Silicon; Stacking; Strain measurement; Thermal stresses; Thermomechanical processes;
Conference_Titel :
Electronics Packaging Technology Conference, 2009. EPTC '09. 11th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-5099-2
Electronic_ISBN :
978-1-4244-5100-5
DOI :
10.1109/EPTC.2009.5416481