• DocumentCode
    3521741
  • Title

    Optimizing manufacturing process of printed electronics

  • Author

    Salam, B. ; Gan, H.Y. ; Lok, B.K. ; Albert, L. C W

  • Author_Institution
    Large Area Process. (LAP) Programme, Singapore Inst. of Manuf. Technol., Singapore, Singapore
  • fYear
    2009
  • fDate
    9-11 Dec. 2009
  • Firstpage
    163
  • Lastpage
    167
  • Abstract
    Printed electronics generally refers to the creation of electronic functionality, e.g. conducting circuitry, electrical components, by means of conventional printing techniques on common media such as plastics and paper. The main benefit of printed electronics is the simplified fabrication process, because of the elimination of the complex photolithography process. This means lower cost and shorter cycle time. However, several challenges must still be addressed, such as reliability, electrical performance and peripheral interfacing. Hereby peripheral interfacing was addressed, in particular the manufacturing process of the printed interconnects was studied. The study was conducted following the 2(7-4) fractional factorial design of experiment (DOE) method. Experimental parameters were curing temperature, curing time, pad thickness, pad sizes, solder alloys, cleaning time and number of reflows. Results of the study include effects of the parameters on shear strength of the printed interconnects and the recommendation of values to best employ.
  • Keywords
    curing; design of experiments; electronics packaging; integrated circuit interconnections; printed circuit manufacture; reflow soldering; shear strength; solders; surface cleaning; cleaning time; curing temperature; curing time; design of experiment method; electronics packaging technology; fractional factorial design; manufacturing process optimization; pad size; pad thickness; peripheral interfacing; printed electronics; printed interconnects; printing technique; reflow process; shear strength; solder alloys; Costs; Curing; Fabrication; Integrated circuit interconnections; Lithography; Manufacturing processes; Plastics; Printing; Temperature; US Department of Energy; manufacturing yields; printed copper; printed electronics; printed interconnects; shear strength;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2009. EPTC '09. 11th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-5099-2
  • Electronic_ISBN
    978-1-4244-5100-5
  • Type

    conf

  • DOI
    10.1109/EPTC.2009.5416556
  • Filename
    5416556