DocumentCode
352180
Title
Block-matching evaluation in digital architectures for motion estimation
Author
Raffo, Luigi ; Zizola, Maria Paola
Author_Institution
Dept. of Electr. & Electron. Eng., Cagliari Univ., Italy
Volume
4
fYear
2000
fDate
2000
Firstpage
305
Abstract
In this paper a comparison between different methods for block matching in image processing with respect to the efficacy of their digital VLSI implementation is presented. In this framework a new method based on limiting the role of mismatching pixels is proposed. The results obtained on different kinds of images show that the new method achieves the best trade-off between complexity and results
Keywords
VLSI; image matching; image sequences; motion estimation; VLSI implementation; block-matching evaluation; complexity; digital architectures; mismatching pixels; motion estimation; Hardware; Image processing; Layout; Motion detection; Motion estimation; Pixel; Velocity measurement; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location
Geneva
Print_ISBN
0-7803-5482-6
Type
conf
DOI
10.1109/ISCAS.2000.858749
Filename
858749
Link To Document