• DocumentCode
    3525571
  • Title

    Cache-friendly implementations of transitive closure

  • Author

    Penner, Michael ; Prasanna, Viktor K.

  • Author_Institution
    Univ. of Southern California, CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    185
  • Lastpage
    196
  • Abstract
    We show cache friendly implementations of the Floyd-Warshall algorithm for the all-pairs shortest-path problem. We first compare the best commercial compiler optimizations available with standard cache-friendly optimizations and a simple improvement involving a block layout, which reduces TLB misses. We show approximately 15% improvements using these optimizations. We also develop a general representation, the unidirectional space time representation, which can be used to generate cache friendly implementations for a large class of algorithms. We show analytically and experimentally that this representation can be used to minimize level-1 and level-2 cache misses and TLB misses and therefore exhibits the best overall performance. Using this representation we show a 2× improvement in performance with respect to the compiler optimized implementation. Experiments were conducted on Pentium III, Alpha, and MIPS R12000 machines using problem sizes between 1024 and 2048 vertices. We used the Simplescalar simulator to demonstrate improved cache performance
  • Keywords
    cache storage; dynamic programming; optimising compilers; software performance evaluation; virtual machines; Alpha machines; MIPS R12000 machines; Pentium III machines; Simplescalar simulator; TLB misses; all-pairs shortest path problem; block layout; cache friendly implementations; cache misses; cache performance; compiler optimizations; dynamic programming; experiment; transitive closure; unidirectional space time representation; Contracts; Costs; Linear algebra; Microprocessors; Modems; Monitoring; Optimizing compilers; Performance analysis; Systolic arrays; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Architectures and Compilation Techniques, 2001. Proceedings. 2001 International Conference on
  • Conference_Location
    Barcelona
  • ISSN
    1089-796X
  • Print_ISBN
    0-7695-1363-8
  • Type

    conf

  • DOI
    10.1109/PACT.2001.953299
  • Filename
    953299