DocumentCode
3529303
Title
Denuded-WNx/poly-Si gate technology for deep sub-micron CMOS
Author
Lee, Byung Hak ; Park, Nae Hak ; Han, Sang Beom ; Lee, Kyungho
Author_Institution
R&D Div, Hyundai MicroElectron. Co. Ltd., Cheongju, South Korea
fYear
1999
fDate
1999
Firstpage
225
Lastpage
228
Abstract
We found that RTA of amorphous WNx/poly-Si resulted in denudation of nitrogen atoms with the formation of low resistivity W and a highly reliable in situ barrier layer simultaneously. Furthermore, electrical characteristics of the denuded-WNx/poly-Si gate were superior to those of W/WNx/poly-Si gate after selective oxidation and post anneal processes
Keywords
CMOS integrated circuits; ULSI; contact resistance; integrated circuit metallisation; integrated circuit reliability; oxidation; rapid thermal annealing; thermal stability; tungsten compounds; 0.15 mum; 800 to 1000 C; N atom denudation; RTA; W; WN-Si; deep sub-micron CMOS; denuded-WNx/poly-Si gate technology; electrical characteristics; gate structure; highly reliable in situ barrier layer; low resistivity W; post anneal; selective oxidation; sheet resistance; thermal stability; Amorphous materials; Bonding; CMOS technology; Hydrogen; Nitrogen; Oxidation; Performance evaluation; Rapid thermal annealing; Temperature; Thermal stability;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-5727-2
Type
conf
DOI
10.1109/ICVC.1999.820886
Filename
820886
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