DocumentCode
3530009
Title
A visual simulation tool at layout level
Author
Casacurta, Alexandre ; Almeida, Marcel Furtado ; Reis, Ricardo
Author_Institution
Univ.do Vale do Rio dos Sinos, Sao Leopoldo, Brazil
fYear
2003
fDate
1-2 June 2003
Firstpage
110
Lastpage
111
Abstract
This paper presents a Web-based graphical tool that makes it possible to view and simulate a working circuit at the layout level. This tool allows one to observe changes in logical levels with a dynamic alteration of the color properties of the graphical elements that characterize the circuit at layout level. The layout view changes colors in function of logic level changes. Two aspects of the circuit simulation are presented: taking into account the gates delay or not.
Keywords
circuit layout; circuit simulation; colour graphics; software tools; Web-based graphical tool; circuit layout; circuit simulation; graphical elements; logic level changes; visual simulation tool; Circuit simulation; Data mining; Data structures; Delay; Java; Layout; Logic; Microelectronics; Optical propagation; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on
Print_ISBN
0-7695-1973-3
Type
conf
DOI
10.1109/MSE.2003.1205278
Filename
1205278
Link To Document