• DocumentCode
    3531395
  • Title

    Bidirectional Single-Supply Level Shifter with Wide Voltage Range for Efficient Power Management

  • Author

    Manohar, Sujan K. ; Somasundar, Vinod K. ; Venkatasubramanian, Ramakrishnan ; Balsara, Poras T.

  • Author_Institution
    VLSI Circuits & Syst. Lab., Univ. of Texas at Dallas, Richardson, TX, USA
  • fYear
    2012
  • fDate
    7-11 Jan. 2012
  • Firstpage
    125
  • Lastpage
    130
  • Abstract
    Level shifter circuits are used to interface multiple voltage islands in many modern ICs or Systems-on-Chip (SoCs). Single-supply level shifters are being used to reduce the power routing resources and minimize the routing congestion at the chip level. A single-supply bidirectional level shifter aimed at low voltage which offers a wide voltage range (SS-WVRLS) is designed using standard commercial 90nm CMOS process. The proposed level shifter uses analog and digital circuit techniques to provide full voltage shifting range for any combination of supply voltages (VDDIN = VDD,VDDIN <; VDD or VDDIN >; VDD) in any step size (paper shows 25mv step) with no requirement for special low-Vτ or high-Vτ devices, thus reducing the process cost. Post layout SPICE simulation comparison results show that proposed circuit is functional for full core supply voltage range (0.6V - 1.32V) compared to other published level shifters. The circuit was tested for robustness under process mismatch conditions by 1000 point global and local Monte Carlo simulations.
  • Keywords
    CMOS integrated circuits; Monte Carlo methods; SPICE; system-on-chip; CMOS process; IC; SPICE simulation; SS-WVRLS; SoC; analog circuit techniques; bidirectional single-supply level shifter; digital circuit techniques; global Monte Carlo simulations; local Monte Carlo simulations; power management; power routing resource reduction; size 90 nm; systems-on-chip; voltage 0.6 V to 1.32 V; Delay; Discharges; Leakage current; Logic gates; Routing; Threshold voltage; Transistors; Single–Supply; bidirectional; level shifter; routing congestion;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design (VLSID), 2012 25th International Conference on
  • Conference_Location
    Hyderabad
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-4673-0438-2
  • Type

    conf

  • DOI
    10.1109/VLSID.2012.58
  • Filename
    6167740