DocumentCode :
3531650
Title :
A Low-Cost Output Response Analyzer Circuit for ADC BIST
Author :
Ting, Hsin-Wen ; Chao, I-Jen ; Lien, Yu-Chang ; Chang, Soon-Jyh ; Liu, Bin-Da
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
fYear :
2009
fDate :
28-29 April 2009
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, a low-cost ADC output response analyzer (ORA) circuit for built-in self-test (BIST) application is proposed. The sine-wave histogram testing method and the basic coordinate rotation digital computer (CORDIC) technique are used to design the proposed ADC ORA circuit. The ADC´s static and dynamic parameters can both be obtained using the proposed circuit. The basic CORDIC based ADC ORA circuit is designed and synthesized in a 0.18-mum technology to analyze the outputs an 8-bit ADC to verify the designs. It shows a lower area overhead compared with the fast Fourier transform (FFT) based realization.
Keywords :
analogue-digital conversion; built-in self test; fast Fourier transforms; signal processing; BIST application; CORDIC; built-in self-test; circuit design; coordinate rotation digital computer technique; fast Fourier transform; low-cost ADC output response analyzer circuit; sine-wave histogram testing method; size 0.18 mum; word length 8 bit; Accuracy; Built-in self-test; Circuit analysis; Circuit synthesis; Circuit testing; Costs; Fast Fourier transforms; Histograms; Parameter estimation; Performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Testing and Diagnosis, 2009. ICTD 2009. IEEE Circuits and Systems International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-2587-7
Type :
conf
DOI :
10.1109/CAS-ICTD.2009.4960751
Filename :
4960751
Link To Document :
بازگشت