A Parasitic Effect - Free Test Scheme for Ferroelectric Random Access Memory (FRAM)

Since area of FRAM capacitors is smaller, mismatch of bit line capacitors induced by parasitic capacitors of output bit lines and measurement instrument will generate false output. A parasitic effect-free test scheme for FRAM with 2T2C (two transistors two capacitors) architecture is proposed in the paper after investigation of operational principle of sense amplifier. In the proposed scheme, a specific unity gain circuit was designed and connected to the output bit lines of a FRAM cell to separate FRAM capacitors from bit line capacitors. Experimental results demonstrate that correct output can be achieved with parasitic effect-free test scheme, even in the presence of mismatch of bit line capacitors.