• DocumentCode
    3533889
  • Title

    Enhancements to FPGA design methodology using streaming

  • Author

    Plavec, Franjo ; Vranesic, Zvonko ; Brown, Stephen

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
  • fYear
    2009
  • fDate
    Aug. 31 2009-Sept. 2 2009
  • Firstpage
    294
  • Lastpage
    301
  • Abstract
    Capacity of FPGAs has grown significantly, leading to increased complexity of designs targeting these chips. Traditional FPGA design methodology using HDLs is no longer sufficient and new methodologies are being sought. An attractive possibility is to use streaming languages. Streaming languages group data into streams, which are processed by computational nodes called kernels. They are suitable for implementation in FPGAs because they expose parallelism, which can be exploited by implementing the application in FPGA logic. Designers can express their designs in a streaming language and target FPGAs without needing a detailed understanding of digital logic design. In this paper we show how the Brook streaming language can be used to simplify design for FPGAs, while providing reasonable performance compared to other methodologies. We show that throughput of streaming applications can be increased through automatic kernel replication. Using our compiler, the FPGA designer can trade off FPGA area and performance by changing the amount of kernel replication. We describe the details of our compiler and present performance and area of a set of benchmarks. We found that throughput scales well with increased replication for most applications.
  • Keywords
    field programmable gate arrays; logic design; FPGA; HDL; automatic kernel replication; compiler; digital logic design; streaming languages; Design methodology; Educational institutions; Field programmable gate arrays; Graphics; Hardware; Kernel; Logic; Parallel processing; Signal processing algorithms; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
  • Conference_Location
    Prague
  • ISSN
    1946-1488
  • Print_ISBN
    978-1-4244-3892-1
  • Electronic_ISBN
    1946-1488
  • Type

    conf

  • DOI
    10.1109/FPL.2009.5272286
  • Filename
    5272286