Title :
Hardware architecture for advanced image processing
Author :
Grabowski, Kamil ; Napieralski, Andrzej
Author_Institution :
Dept. of Microelectron. & Comput. Sci., Tech. Univ. of Lodz, Lodz, Poland
fDate :
Oct. 30 2010-Nov. 6 2010
Abstract :
The computation speed offered by nowadays embedded systems allows combining advanced signal processing and data acquisition in dedicated architectures optimized for given applications. Such architectures can be used for 2D/3D signal analysis and reconstruction in such broad areas as: medical signal processing - tomography object reconstruction (USG, PET, CT, OCT, etc.), biomedical image analysis - automated object segmentation and diagnostic support, biometry - pattern recognition, etc. The technological advances in the scale of integration of integrated circuits as well as image acquisition and processing systems have played a major part in this trend. In particular, for medical image analysis common problems are content segmentation, analysis of selected objects, pattern estimation and storage. In the paper general architecture for advanced image processing is presented which can be adapted to specific needs, depending on intended use. This article describes a system for analysis of biometric data developed as part of the work conducted by the authors on the complete biometric identification system. Thus, the article focuses mostly on the biometrical iris identification system (1:N), chosen as an example well suited to the validation of the developed system. Several issues concerning efficient data processing using Field Programmable Arrays and Digital Signal Processors are presented on the basis of the described architecture. Algorithms computed on a desktop computer were adapted to this specialized, hardware-oriented architecture composed of Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGA). Obtained results are presented and the developed system is compared with some commercially-available solutions for iris recognition.
Keywords :
data acquisition; digital signal processing chips; embedded systems; field programmable gate arrays; image segmentation; iris recognition; medical image processing; pattern recognition; 2D signal analysis; 3D signal analysis; CT; OCT; PET; USG; advanced image processing; advanced signal processing; automated object segmentation; biomedical image analysis; biometrical iris identification system; biometry; computation speed; content segmentation; data acquisition; diagnostic support; digital signal processors; field programmable arrays; hardware architecture; hardware-oriented architecture; image acquisition; integrated circuits; medical signal processing; pattern estimation; pattern recognition; tomography object reconstruction; Biomedical imaging; Computer architecture; Databases; Digital signal processing; Feature extraction; Image segmentation; Iris recognition; biomedical image processing; biometrics; image analysis; iris recognition; multicore processing;
Conference_Titel :
Nuclear Science Symposium Conference Record (NSS/MIC), 2010 IEEE
Conference_Location :
Knoxville, TN
Print_ISBN :
978-1-4244-9106-3
DOI :
10.1109/NSSMIC.2010.5874488