• DocumentCode
    3536255
  • Title

    Reed-Muller versus traditional Boolean circuit implementation

  • Author

    Tan, E.C. ; Chia, C.Y. ; Wong, K.K.

  • Author_Institution
    Sch. of Appl. Sci., Nanyang Technol. Inst., Singapore
  • fYear
    1995
  • fDate
    6-10 Nov 1995
  • Firstpage
    175
  • Lastpage
    178
  • Abstract
    Digital circuits realized from Reed-Muller (RM) algebraic descriptions are generally less complex than those realized from conventional Boolean methods. This suggests that the technique will be better suited for VLSI or ASIC (application specific integrated circuit) implementations because of the reduction in chip size and increased optimization options. In particular, digital circuits realized from RM universal logic modules (RM-ULMs) have a very simple structure and will incur less propagation delay. The paper presents design examples to illustrate the advantages of RM-based circuits and analyzes the results obtained
  • Keywords
    Boolean functions; VLSI; application specific integrated circuits; integrated logic circuits; logic design; ASIC; Boolean algebra; RM-ULMs; Reed-Muller algebra; VLSI; chip size; design; digital circuits; optimization; propagation delay; universal logic modules; Adders; Application specific integrated circuits; Circuit testing; Digital circuits; Logic circuits; Logic testing; Signal generators; Switching circuits; Synchronous generators; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
  • Print_ISBN
    0-7803-2624-5
  • Type

    conf

  • DOI
    10.1109/TENCON.1995.496366
  • Filename
    496366