• DocumentCode
    3540968
  • Title

    Novel capacitorless double-gate 1T-DRAM cell having nonvolatile memory function

  • Author

    Park, Ki-Heung ; Jeong, Min-Kyu ; Kim, Young Min ; Han, Kyoung Rok ; Kwon, Hyuck-In ; Kong, Seong Ho ; Lee, Jong-Ho

  • Author_Institution
    Sch. of EECS, Kyungpook Nat. Univ., Daegu, South Korea
  • fYear
    2008
  • fDate
    15-16 June 2008
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In this paper, the authors proposed a new double-gate 1-T DRAM cell device which has nonvolatile memory function on one gate. Due to enlarged hole capacity in the floating body by the nonvolatile function, high write1 and low write0 current (high ¿Vth) could be done. By adopting non-overlap structure, device scalability was improved. Proposed device could be a very promising candidate for a future high density and high performance 1T-DRAM cell.
  • Keywords
    DRAM chips; capacitorless double-gate 1T-DRAM cell; floating body; hole capacity; nonoverlap structure; nonvolatile memory function; Charge carrier processes; Degradation; Doping; Electron traps; Impact ionization; Leg; Nonvolatile memory; Random access memory; Scalability; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4244-2071-1
  • Type

    conf

  • DOI
    10.1109/SNW.2008.5418391
  • Filename
    5418391
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3540968