DocumentCode :
3541938
Title :
Area and power reduction techniques for time-based image sensor pixel design
Author :
Matolin, Daniel ; Posch, Christoph ; Wohlgenannt, Rainer
Author_Institution :
AIT - Austrian Inst. of Technol., Vienna, Austria
fYear :
2009
fDate :
19-22 Dec. 2009
Firstpage :
414
Lastpage :
417
Abstract :
This paper presents analytical considerations and practical thoughts leading to the design and implementation of a low power, small-area voltage comparator for pixel-level signal processing in time-based image sensors. The circuit is based on a standard two-stage operational amplifier topology and features an offset suppression technique to minimize the area requirements, a tunable hysteresis and a novel dynamic current control scheme to reduce power consumption. The circuit has been implemented in a QVGA asynchronous pixel array, fabricated in standard 0.18¿m CMOS process. We present the circuit concept and design considerations aiming at minimum power consumption and silicon area. Measurements from the fabricated chip are shown and compared to results from theoretical groundwork.
Keywords :
CMOS image sensors; comparators (circuits); electric current control; low-power electronics; operational amplifiers; CMOS process; QVGA asynchronous pixel array; dynamic current control; low power comparator; offset suppression technique; pixel-level signal processing; power reduction; size 0.18 mum; small-area voltage comparator; time-based image sensors; two-stage operational amplifier; Circuits; Energy consumption; Image analysis; Image sensors; Low voltage; Operational amplifiers; Pixel; Signal analysis; Signal design; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics (ICM), 2009 International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-5814-1
Type :
conf
DOI :
10.1109/ICM.2009.5418593
Filename :
5418593
Link To Document :
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