DocumentCode :
3542491
Title :
The Design of Digital Down Converter Based on FPGA
Author :
Qingxiang Zhang ; Xiaoxiao Su
Author_Institution :
Sch. of Electron. & Inf. Eng., Harbin Inst. of Technol., Harbin, China
fYear :
2012
fDate :
21-23 Sept. 2012
Firstpage :
1
Lastpage :
4
Abstract :
The basic theory of Digital Down Converter (DDC) in digital receiver was discussed in this paper. Xilinx ISE 13.3 software was chosen to design each module of DDC. Then use the Modelsim 6.5 function simulation to verify the functionality correctness of the design. The output signal was simulated in Matlab to analyse the results.
Keywords :
digital filters; field programmable gate arrays; radio receivers; FPGA; Matlab; Modelsim 6.5 function simulation; Xilinx ISE 13.3 software; digital down converter design; digital filter; digital receiver; Field programmable gate arrays; Finite impulse response filter; IP networks; MATLAB; Mixers; Receivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communications, Networking and Mobile Computing (WiCOM), 2012 8th International Conference on
Conference_Location :
Shanghai
ISSN :
2161-9646
Print_ISBN :
978-1-61284-684-2
Type :
conf
DOI :
10.1109/WiCOM.2012.6478707
Filename :
6478707
Link To Document :
بازگشت