DocumentCode :
3542867
Title :
A new binary tree algorithm implementation with Huffman decoder on FPGA
Author :
Beak, Seunghyun ; Van Hieu, B. ; Park, Gyungleen ; Lee, Kyungtaek ; Jeong, Taikyeong
Author_Institution :
Dept. of Electron. Eng., Myongji Univ., Yongin, South Korea
fYear :
2010
fDate :
9-13 Jan. 2010
Firstpage :
437
Lastpage :
438
Abstract :
Compression is useful technique in digital system, as it reduces the channel bandwidths and storage size. This paper presents new Huffman decoder based on binary tree method for improving usage of memory and speed. It is shown through experiment result related to computational speed that the propose method is superior to other predecessor. The customized Huffman hardware decoder comparison is presented at different speed on various FPGA´s.
Keywords :
Huffman codes; bandwidth compression; digital storage; digital systems; field programmable gate arrays; trees (mathematics); FPGA; Huffman hardware decoder; binary tree algorithm; channel bandwidths; digital system; Binary trees; Decoding; Field programmable gate arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics (ICCE), 2010 Digest of Technical Papers International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-4314-7
Electronic_ISBN :
978-1-4244-4316-1
Type :
conf
DOI :
10.1109/ICCE.2010.5418718
Filename :
5418718
Link To Document :
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