• DocumentCode
    3544022
  • Title

    Placement for the reconfigurable datapath architecture

  • Author

    Lai, Yen-Tai ; Lai, Hsin-Ya ; Yeh, Chia-Nan

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    1875
  • Abstract
    A reconfigurable computing (RC) machine can be configured to execute various functions. An RC machine is composed of a host computer and a reconfigurable processing unit. A reconfigurable hardware, called reconfigurable datapath architecture (rDPA), was presented by the University of Kaiserslautern in Germany. The rDPA is designed for the evaluation of any arithmetic or logic expression from a high level description. We present an algorithm to compile a given program into a configuration that can be embedded on an rDPA. The arithmetic expressions in a program are represented by a data flow graph (DFG) in which a vertex represents an operator and an edge represented a data flow between two vertices. The placement step assigns a processing unit in the rDPA to implement a vertex in the DFG. Our strategy is to find a spanning tree in a DFG and route the interconnections corresponding to tree edges through abutment. The remaining is routed through the global interconnect. The algorithm produces a placement in O(|V|2) time.
  • Keywords
    computational complexity; data flow graphs; digital arithmetic; logic CAD; network routing; program compilers; programmable logic arrays; reconfigurable architectures; trees (mathematics); arithmetic expressions; data flow graph; global interconnect; high level description; host computer; processing unit; program compiler; programmable processors; reconfigurable computing machine; reconfigurable datapath architecture; reconfigurable processing unit; spanning tree; time complexity; Arithmetic; Computer architecture; Flow graphs; Hardware; Integrated circuit interconnections; LAN interconnection; Logic design; Multiprocessor interconnection networks; Registers; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1464977
  • Filename
    1464977