DocumentCode :
3544057
Title :
A scalable architecture for low and intermediate level image processing
Author :
Olk, J.G.E. ; Jonker, P.P.
Author_Institution :
Pattern Recognition Group, Delft Univ. of Technol., Netherlands
fYear :
1997
fDate :
20-22 Oct 1997
Firstpage :
270
Lastpage :
274
Abstract :
This paper proposes a design for a scalable architecture for low and intermediate level image processing in real-time applications. The architecture is envisioned as a plug-in extension to plain personal workstations or MIMD systems. The main focus points of the architecture design are the scalability, handling of different image sizes, and providing hardware support for a technique named bucket processing that achieves speedup by reducing the amount of processed data
Keywords :
add-on boards; image processing; parallel architectures; bucket processing; hardware support; image processing; plug-in extension; real-time applications; scalable architecture; Costs; Data structures; Focusing; Hardware; Image processing; Pattern recognition; Physics; Scalability; Signal processing; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture for Machine Perception, 1997. CAMP 97. Proceedings. 1997 Fourth IEEE International Workshop on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-7987-5
Type :
conf
DOI :
10.1109/CAMP.1997.632042
Filename :
632042
Link To Document :
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